1. Field
The disclosure relates generally to an improved data processing system for precision control of phases of clock signals, and more specifically, to a high-precision current-mode phase rotator.
2. Description of the Related Art
Phase rotators are critical components of clock subsystems of modern data processing and communications systems. Phase rotators modify, in a highly precise and reproducible fashion, the phase of clock signals within an unlimited phase range and therefore are capable of generating clock signals with programmable phase and frequency offsets. A common architecture used to design high-speed phase rotators is based on current-mode logic (CML) and uses a quadrature clock set of I,Q in which four clock phases at 0, 90, 180, and 270 degrees are labeled as +I, +Q, −I, −Q. An implementation of the architecture derives high speed-and-ease of implementation of highly linear mixers, for example, highly linear analog multipliers, from use of the current-mode logic circuits. Existing phase rotators based on this architecture typically consist of a first part of a four-quadrant differential current-mode mixer receiving as input four high-speed clock phases and driven by four variable currents that encode their respective weights, and a second part containing current-mode digital to analog converter (DAC), also referred to as integrated digital to analog converter (IDAC), that generates the four variable currents. The latter part of the rotator comprising the digital to analog converter typically dominates the circuit area. Therefore, it is usually desirable to minimize the complexity of the digital to analog converter.
In an ideal case, the weighting currents generated by the digital to analog converter would be sinusoidal functions of the desired phase shift φ, and more specifically, the weights applied to differential phases I=(+I,−I) and Q=(+Q,−Q) would be cos φ and sin φ respectively. However, the complexity of such an ideal digital to analog converter makes implementation impractical and a piece-wise linear approximation of the intended sinusoidal shape of the output signal of such digital to analog converters is used instead.
Two basic types of current-mode logic quadrature phase rotators are in common use, which differ by the digital to analog converter approach used to produce the required four current outputs used. A first type uses a single dual-output digital to analog converter with two polarity switches and a second type uses two such digital to analog converters without switches. The first type is simpler to implement and produces weighting coefficients that approximate the sine wave with a triangular wave. The second type is approximately twice as complex to implement as the first and approximates the sine wave with a trapezoidal wave with equal duration of slewing and flat portions.
The first type of the single-digital to analog converter architecture produces interpolation non-linearity in the vicinity of the polarity-switching points. The second type that uses the dual-digital to analog converter architecture, while generally producing more linear results due to non-switching, typically suffers from reduced power efficiency. Power reduction may be approximately a 3 dB of extra power loss. Use of two converters instead of one requires a larger area due to the increased complexity. In addition, both of these architectures exhibit substantial variability of gain for different rotation phase angles, such as approximately 3 dB.
A better solution for a current-mode quadrature-input phase rotator is required to reduce the nonlinear behavior of a switched single digital to analog converter approach while remaining simpler than the dual-digital to analog converter approach and retaining the high power efficiency of the single-digital to analog converter solution.